GOLDMOMO_ENDLOS


finished sometime or never

Hardware

  • Supported System(s)
    • Altera DE2-115
  • UCore (self written utility core) [download doc]
    • 16 Bit ALU (arithmetic, logic, bitfield, io, ..)
    • 32 Bit extern address io
    • 8 Register
    • 6 stage pipeline (except external io instructions, every instruction need one cycle, no stalls)
    • 106.48 MHz Clock Speed (>100MIPS throughput)
    • extension for gfx acceleration
  • UCtrl [download doc]

  • HCores (self written special multi cores) [currently in EXPERIMENTAL state, NOT finished/released]
    • >= 8 Cores config
    • 32 Bit Integer ALU
    • 32 Bit Floatingpoint ALU (full pipelined)
    • 256 GP Register (per Core, shared between Int/Float)
    • Multibypass (result to input feading)
    • Parallel functions (distributed jumps to other cores)
    • Instruction Cache (current config is 8 Ways with 64 Words)
    • Data Cache
    • Asynchronous path for
      • Memory access (preload data & uncached)
      • Ucore communication (read/write to uctrl/ucore)
      • Semaphore block (current done via ucore com (software emulation))
      • Pixelpipeline (Bi/Trilinear pixel load with programmable compression (S3TC))
      • ...
    • ...
    • LLVM target implementation (C/C++ compiler)

  • Software

  • Cross-Assembler (Windows) [download]
  • Emulator (with debug features) (Windows)
  • conversion Tools (gfx, sdcard io, ...) (Windows)
  • Games and many test programs (board io, audio, gfx, ...) (goldmomo_endlos) [download]

  • To do:

  • Finish HCores design / Write demo applications for HCores

  • File Resources

    Get 'Daily' Build which includes documentation, cross assembler, emulator, gfx converter, example packages, ucore source code, VHDL source of complete system ...
    Get 'Daily' Build of some windows programs (MODPlayer with source code, ...)
    Get Sheriff 2213 for Altera DE2-115 (incl. FLASH, FPGA, SDCard files)
    Contact



    Haftungsauschluss